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68HC12 “Model”


Notes:

The condition code register is also called the flag register in some microprocessors.
A flag is said to be “set” when the value of its corresponding bit of the condition code register is one. The four least significant bits of this register contain the carry (C), overflow (V), zero (Z), and negative (N) flags.

The carry flag C is set when the addition of two positive numbers results in a value greater than 216-1 or when a borrow into the most significant bit occurs in subtraction.
The overflow flag V is set whenever the result of an operation does not fit in the register specified by the instruction.
The zero flag Z is set when all bits of the result of an arithmetic or logic operation are zero.
The negative flag N is set when the result of an arithmetic or logic operation is a negative number.
The half carry flag H is set when the addition a pair of one digit BCD numbers results in a carry into bit 4 (remember that the bits are numbered 0 through 7).
Some of the remaining flags will be discussed in later lectures.

Note that not all instructions affect all flags, for example, only the ABA, ADC, and ADD instructions affect the half carry flag H. The instruction set tables indicate which flags an instruction affects.