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TMSK2 and TFLG2 Registers
Timer Interrupt Mask 2 Register (TMSK2)
- Bit 7, Timer Overflow Interrupt enable bit (TOI)
- Bits 0, 1, and 2, Timer Prescaler select bits (PR0, PR1, and PR2)
- 000 <---> one count per E-clock periods
- 001 <---> one count per two E-clock periods
- Etc. up to 101 <---> one count per 32 E-clocks.
TFLG2 (located at 0x008F)
- Bit 7 Timer Overflow Flag (TOF)
- TOF is cleared by any write to TFLG2 with bit 7 set.
The last two possible values for the timer prescaler bits (110 and 111) are reserved and cannot be used to lengthen the counter interval. Unlike the HC11, in which the prescaler control bits were timed-write-once bits, the prescaler bits of the HC12 can be changed during program execution. However, a change in the prescale factor will not take effect until the prescale counter stages reach zero, so the range of possible values of this delay must be considered when writing code that changes the prescale factor during execution.
Note that in the TFLG register, setting a bit (writing a one to that bit) causes the corresponding but to be cleared.