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Notes:


Next, based on the memory map described on the previous pages, we can determine the general connection of the memory component to the buses. Assuming that each type of memory uses only one chip, the RAM chip has 12 address pins, 8 data pins, 1 write pin, 1 output enable pin, and 1 chip select pin; the EEPROM chip has 10 address pins, 8 data pins, 1 write pin, 1 output enable pin, and 1 chip select pin; the ROM chip has 15 address pins, 8 data pins, 1 output enable pin and 1 chip select pin.

We should pay special attention to the number of address lines on each memory chip because they are different from the total number of address lines on the bus.

At this time, the only pins on the memory chip that we do not know how to connect are the chip enable pins. Next we will design the address decoding circuits. The outputs of the address decoding circuits are connected to the chip enable pins of the memory chips.