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Standard Timer Module (TIM)
16-bit free-running up-counter ($0000 to $FFFF) shares port T pins.
- Counter is in TCNT (TCNTH and TCNTL).
- TMSK2 register contains TOI and PR0, PR1, PR2
- TFLG2 contains TOF
- TIOS and TC0 throug TC7
- Flag register TFLG1
- Interrupt enable bits in TMSK1
- Edge specification in TCTL3, TCTL4
In this lecture, we review the concepts and use of the M68HC12B Standard Timer Module (TIM). The primary references for this material are the M68HC12B Family Data Sheet and sections 7.5 through 7.8 (pp. 244-278) of the textbook by Pack and Barrett.
The heart of the timer module is the 16-bit free-running counter. The input and output capture functions capture the value of the couter at the occurrence of an input or output event. Events to be captured are specified using control registers.
After discussing the timer module, we'll go on to discuss mapping of internal (on-chip) resources. Addresses of RAM, EEPROM, and the register block can be changed from the defaults by writing to the appropriate initialization registers.