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The figure above shows the concept of peripheral to memory DMA operation.
The peripheral to memory DMA operates according to the following steps:
Microprocessor writes to DMA controller and peripheral device to request particular DMA operation.
When peripheral device is ready, it sends a DMA request signal to DMA controller.
DMA controller requests CPU for buses (Hold Request).
CPU gives the buses to DMA (Hold Ack) and disconnects itself from the buses.
DMA controller gives DMA Ack signal back to peripheral device to signal the start of DMA.
DMA sends read control signal to peripheral device and puts the destination address and read signal on address and control buses for memory.
Data transfers from peripheral to memory directly.
As each byte transferred, the destination address is incremented by 1.
If the value in the byte counter is not equal to the block size, go to step 6; else, DMA gives the buses back to CPU (withdraws Hold Request).