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Digital signal processors
Specially designed for signal processing which involves lots of dot product operations ( aixi ) and matrix manipulations
- special hardware multiplier circuits are used to support one clock multiplication
- Example: one clock MAC (multiply and accumulate) instruction
- special registers are used to hold intermediate results
- special addressing modes are used
- low cost is required
Digital signal processors are designed for digital signal processing applications. The nature of signal processing requires fast data sampling and calculation. Since the dot product operation is the main computation in most digital signal processing algorithms, special features are included in the DSP chip. Such features include the special hardware circuits for multiply and accumulate instruction (MAC) that speed up the dot product operation. Most DSPs also include special addressing modes for speeding up the dot product operation and fast Fourier transform. Since these features are specially designed for dot product operations, GPPs of similar price cannot match the speed of DSPs.
The Harvard architecture is usually used for DSPs. Many DSPs claim that they can do a MAC in one clock cycle. It should be noted that this is describing throughput. The execution of each MAC instruction actually takes multiple clock cycles. It is the pipeline that makes it look like one MAC is done in each clock cycle.
DSPs cannot replace GPPs. DSPs are faster than GPPs mainly for dot product operations. DSPs are not faster than GPPs for logic and general arithmetic operations. Besides, it is more difficult to write assembly programs for DSPs. In order to use some addressing modes, one needs to know the internal structure of the DSP and cannot just treat the DSP as a black box.