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M68HC12 SCI operation
- Poll the SCIxSR1 until TDRE (bit 7 of SCxSR1) goes high.
- Write to SCIxDRH and SCIxDRL.
- Poll the SCIxSR1 until RDRF (bit 5 of SCxSR1) goes high.
- Read from SCIxDRH and SCIxDRL
The “x” above can be “0” or “1” on the A4 version of the HC12, but for the B versions, x = 0.
When copying a set of data from one memory (or I/O) location to another memory (or I/O) location, the microprocessor needs to read the data from the source location into the CPU and then write the data to the destination location. Since executing each read or write instruction may take several clock cycles, the data transfer is slow.
A DMA chip is a special processor that just does read and write operations. Each read or write takes only one clock cycle.
There are some clock cycles that the CPU does not need the buses. DMA can use these bus cycles to transfer data.