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Increasing computer speed
Execute several instructions in a pipelined fashion.
Execute several instructions in parallel (scalar structure).
Put instructions and data in fast memory (cache).
Put cache inside the CPU chip.
Divide memory into program memory and data memory (Harvard architecture).
Make the data bus wider so that operands can be read together with instructions.
Use special circuits for special applications.
Reduce power consumption in order to put more circuits onto one chip.
Many techniques have been developed for increasing the computer speed. A common approach is to execute several instructions in an “assembly line” manner and/or in parallel.
When the instruction execution is fast, transferring information between the CPU and the memory may become the bottleneck. Therefore, the techniques of cache, Harvard architecture, and use of extra wide data buses have been developed. As chip manufacturing technology advances, more circuits can be put on the same chip to increase computation speed. When circuits becomes large, the power consumption increases which causes problem in chip packaging. Therefore, low voltage logic devices have been developed to reduce power consumption. Each of these techniques has been further improved and extended to increase the computation and data transfer speed.